In video system applications, a picture is displayed on a television or a computer screen by scanning an electrical signal horizontally across the screen one line at a time using a scanning circuit. The amplitude of the signal at any one point on the line represents the brightness level at that point on the screen. When a horizontal line scan is completed, the scanning circuit is notified to retrace to the left edge of the screen and start scanning the next line provided by the electrical signal. Starting at the top of the screen, all the lines to be displayed are scanned by the scanning circuit in this manner. A frame contains all the elements of a picture. The frame contains the information of the lines that make up the image or picture and the associated synchronization signals that allow the scanning circuit to trace the lines from left to right and from top to bottom.
There may be two different types of picture or image scanning in a video system. For some television signals, the scanning may be interlaced, while for some computer or TV signals the scanning may be progressive or non-interlaced. Interlaced video occurs when each frame is divided into two separate sub-pictures or fields. These fields may have originated at the same time or at subsequent time instances. The interlaced picture may be produced by first scanning the horizontal lines for the first field and then retracing to the top of the screen and then scanning the horizontal lines for the second field. The progressive, or non-interlaced, video may be produced by scanning all of the horizontal lines of a frame in one pass from top to bottom.
In video compression, communication, decompression, and display, there has been for many years problems associated with supporting both interlaced content and interlaced displays along with progressive content and progressive displays. Many advanced video systems support either interlaced or progressive video but not both. As a result, deinterlacers, devices or systems that convert interlaced video into progressive video, have become an important component in many video systems. The deinterlacer may take the available lines from a current field and may determine the remaining lines needed to fill the progressive output frame. The process of deinterlacing may be seen as taking one present line of pixels from the source field and producing two output lines of pixels. One line is the line that came from the source field and may be called the “present” line, while the other line is the line that needs to be created and may be called the “absent” line. Interlaced fields may be of two types, top fields and bottom fields. Top fields may have a present line as their first line and bottom fields may have an absent line as their first line. The sequence of fields in interlaced video alternate between top fields and bottom fields.
The input to a deinterlacer may require buffering in a memory device, for example, a DRAM, since the output of the deinterlacer may be continuous even when its input may be active for a current line and then inactive for a next line. Although the deinterlacer utilizes the same average DRAM access bandwidth when its input is active for every other line, as well as when its input is continuously active, the peak DRAM access bandwidth when the input is active for every other line may be doubled. This may require that twice the DRAM bandwidth be reserved for accessing buffered input. Morevover, since the average output pixel rate is twice the average input pixel rate, the classical or conventional approach to the buffering requirement would be to add a buffer, for example, a FIFO, at the input. In the case of a multi-field deinterlacer, there may be many field stores that may be read in parallel and a FIFO may be required for each of those parallel inputs. Accordingly, adding a FIFO at each input may be expensive to implement, especially on-chip where real estate is a premium.
Further limitations and disadvantages of conventional and traditional approaches will become apparent to one of skill in the art, through comparison of such systems with some aspects of the present invention as set forth in the remainder of the present application with reference to the drawings.